/*
 * Copyright (c) 2009-2010 HIT Microelectronic Center
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 *
 * Authors: Gou Pengfei
 *
 * Date: Aug. 2010
 *
 */

#ifndef __CPU_ATOMIC_EDGE_IMPL_HH__
#define __CPU_ATOMIC_EDGE_IMPL_HH__

#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
#include "base/refcnt.hh"
#include "base/types.hh"

class AtomicEdgeCPU;
template<class Impl> class AtomicEdgeDynInst;
template<class Impl> class AtomicEdgeBlock;

struct AtomicEdgeCPUImpl
{
    typedef TheISA::MachInst MachInst;
    typedef AtomicEdgeDynInst<AtomicEdgeCPUImpl> DynInst;
    typedef AtomicEdgeBlock<AtomicEdgeCPUImpl> EdgeBlock;
    typedef RefCountingPtr<DynInst> DynInstPtr;
    typedef RefCountingPtr<EdgeBlock> EdgeBlockPtr;
    typedef AtomicEdgeCPU CPU;
    typedef CPU CPUType;

    enum {
        MaxThreads = 4, // Currently no support for multi-threading
        MaxByteNum = 8
    };
};

#endif // __CPU_ATOMIC_EDGE_IMPL_HH__
